TL;DR: KVM's AVIC and optimized APIC map code doesn't correctly handle various edge cases that are architecturally legal(ish), but are unlikely to occur in most real world scenarios. I have tested this heavily with KUT, but I haven't booted Windows and don't have access to x2AVIC, so additional testing would be much appreciated. v3: - Collect reviews. [Paolo] - Drop "partial" x2APIC inhibit and instead delete the memslot. [Maxim, Suravee] - Skip logical mode updates for x2APIC, which just reuses the phys_map with some clever logic. [Suravee] - Add a fix for "nodecode write" traps. [Alejandro] v2: - https://lore.kernel.org/all/20220903002254.2411750-1-seanjc@xxxxxxxxxx - Collect reviews. [Li, Maxim] - Disable only MMIO access when x2APIC is enabled (instead of disabling all of AVIC). [Maxim] - Inhibit AVIC when logical IDs are aliased. [Maxim] - Tweak name of set_virtual_apic_mode() hook. [Maxim] - Straight up revert logical ID fastpath mess. [Maxim] - Reword changelog about skipping vCPU during logical setup. [Maxim] - Fix LDR updates on AVIC. [Maxim?] - Fix a nasty ISR caching bug. - Flush TLB when activating AVIC. v1: https://lore.kernel.org/all/20220831003506.4117148-1-seanjc@xxxxxxxxxx Sean Christopherson (27): KVM: x86: Blindly get current x2APIC reg value on "nodecode write" traps KVM: x86: Purge "highest ISR" cache when updating APICv state KVM: SVM: Flush the "current" TLB when activating AVIC KVM: SVM: Process ICR on AVIC IPI delivery failure due to invalid target KVM: x86: Don't inhibit APICv/AVIC if xAPIC ID mismatch is due to 32-bit ID KVM: x86: Move APIC access page helper to common x86 code KVM: x86: Inhibit APIC memslot if x2APIC and AVIC are enabled KVM: SVM: Don't put/load AVIC when setting virtual APIC mode KVM: SVM: Replace "avic_mode" enum with "x2avic_enabled" boolean KVM: SVM: Compute dest based on sender's x2APIC status for AVIC kick Revert "KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible" KVM: SVM: Document that vCPU ID == APIC ID in AVIC kick fastpatch KVM: SVM: Add helper to perform final AVIC "kick" of single vCPU KVM: x86: Explicitly skip optimized logical map setup if vCPU's LDR==0 KVM: x86: Explicitly track all possibilities for APIC map's logical modes KVM: x86: Skip redundant x2APIC logical mode optimized cluster setup KVM: x86: Disable APIC logical map if logical ID covers multiple MDAs KVM: x86: Disable APIC logical map if vCPUs are aliased in logical mode KVM: x86: Honor architectural behavior for aliased 8-bit APIC IDs KVM: x86: Inhibit APICv/AVIC if the optimized physical map is disabled KVM: SVM: Inhibit AVIC if vCPUs are aliased in logical mode KVM: SVM: Always update local APIC on writes to logical dest register KVM: SVM: Update svm->ldr_reg cache even if LDR is "bad" KVM: SVM: Require logical ID to be power-of-2 for AVIC entry KVM: SVM: Handle multiple logical targets in AVIC kick fastpath KVM: SVM: Ignore writes to Remote Read Data on AVIC write traps Revert "KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu" Suravee Suthikulpanit (1): KVM: SVM: Fix x2APIC Logical ID calculation for avic_kick_target_vcpus_fast Documentation/virt/kvm/x86/errata.rst | 11 + arch/x86/include/asm/kvm_host.h | 51 +++- arch/x86/kvm/lapic.c | 224 +++++++++++++--- arch/x86/kvm/lapic.h | 2 + arch/x86/kvm/svm/avic.c | 363 ++++++++++++-------------- arch/x86/kvm/svm/svm.c | 4 +- arch/x86/kvm/svm/svm.h | 11 +- arch/x86/kvm/vmx/vmx.c | 36 +-- arch/x86/kvm/x86.c | 7 + 9 files changed, 426 insertions(+), 283 deletions(-) base-commit: 372d07084593dc7a399bf9bee815711b1fb1bcf2 -- 2.37.3.968.ga6b4b080e4-goog