On 2022-09-19 11:22 a.m., Wang, Wei W wrote: > On Monday, September 19, 2022 10:41 PM, Liang, Kan wrote: >> Another fake event? We have to specially handle it in the perf code. I don't >> think it's a clean way for perf. > > We can check the patch later. I think it should be clean, like the LBR side. I doubt. Perf already specially handles the fake LBR event in several places from the core code to the LBR code. It also occupy a reserved bit. If there is another choice, I don't think we want to go that way. > >> >>> - on VMEnter: >>> -- perf_disable_event_local(host_event); >>> -- perf_enable_event_local(guest_event); >>> - on VMExit: >>> -- perf_disable_event_local(guest_event); >>> -- perf_enable_event_local(host_event); >> >> Why we cannot use the same way as the perf core driver to switch the MSRs in >> the VMCS? > > The current MSR switching list from VMCS isn’t fast, > should be the last resort when really necessary. > It's a documented way in the SDM. I believe there must be some reason Intel introduces it. Since it's an documented (or recommended) way, I think we'd better use it if possible. Since both the PT and the core driver needs to switch MSRs during VMCS, it's better to use the same way (function) to handle them. Thanks, Kan >> >> You just need one generic function, perf_guest_get_msrs(), for both PT and >> core driver. If you have to disable PT explicitly before VMCS, I think you can do >> it in the PT specific perf_guest_get_msrs(). > > The disable is done via " Clear IA32_RTIT_CTL" VMExit control. > It can ensure PT disabled in time on VMExit, so no need to go through perf_guest_get_msrs. >
