在2022年9月13日九月 下午3:55，David Woodhouse写道： > On Tue, 2022-09-13 at 15:09 +0100, Jiaxun Yang wrote: [...] > > Your best bet is probably to have the hypervisor trap accesses to the > ath11k_ce_srng_msi_ring_params_setup and ath11k_dp_srng_msi_setup > registers and do the same trick of allocating a host IRQ route and > writing the converted MSI message. > > The alternative is to build some kind of enlightenment to let the guest > ask the hypervisor to tell it the correct remappable format message to > use... but that's going to get very horrid very quickly. If your > hardware allows you to read the MSI(X) table via some other indirect > route which isn't trapped by the hypervisor to give you back the > "original" thing you wrote, perhaps you could write to an unused MSI > and then read back what the hardware *actually* contains... then write > that to the special register? But that's kind of awful. Indeed both ideas sound awful... My current approach is raise a guest APIC interrupt when 0x25 fault happens. Though I'm currently hardcoding guest APIC destination but I think it's possible to check fault MSI address/data from fault event address/data registers against DMAR interrupt mapping table to determine actual destination? It's bit of trap and emulation, think that will enable DMAR driver to handle such situtation. Thanks. > > 附件: > * smime.p7s -- - Jiaxun
