Hi Ricardo,
On Fri, Sep 9, 2022 at 12:46 PM Ricardo Koller <ricarkol@xxxxxxxxxx> wrote:
>
> On Wed, Aug 24, 2022 at 10:08:40PM -0700, Reiji Watanabe wrote:
> > Remove the hard-coded {break,watch}point #0 from the guest_code()
> > in debug-exceptions to allow {break,watch}point number to be
> > specified. Subsequent patches will add test cases for non-zero
> > {break,watch}points.
> >
> > Signed-off-by: Reiji Watanabe <reijiw@xxxxxxxxxx>
> > ---
> > .../selftests/kvm/aarch64/debug-exceptions.c | 50 ++++++++++++-------
> > 1 file changed, 32 insertions(+), 18 deletions(-)
> >
> > diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
> > index 51047e6b8db3..183ee16acb7d 100644
> > --- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
> > +++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
> > @@ -93,6 +93,9 @@ GEN_DEBUG_WRITE_REG(dbgwvr)
> >
> > static void reset_debug_state(void)
> > {
> > + uint8_t brps, wrps, i;
> > + uint64_t dfr0;
> > +
> > asm volatile("msr daifset, #8");
> >
> > write_sysreg(0, osdlr_el1);
> > @@ -100,11 +103,20 @@ static void reset_debug_state(void)
> > isb();
> >
> > write_sysreg(0, mdscr_el1);
> > - /* This test only uses the first bp and wp slot. */
> > - write_sysreg(0, dbgbvr0_el1);
> > - write_sysreg(0, dbgbcr0_el1);
> > - write_sysreg(0, dbgwcr0_el1);
> > - write_sysreg(0, dbgwvr0_el1);
> > +
> > + /* Reset all bcr/bvr/wcr/wvr registers */
> > + dfr0 = read_sysreg(id_aa64dfr0_el1);
> > + brps = cpuid_get_ufield(dfr0, ID_AA64DFR0_BRPS_SHIFT);
>
> I guess this might have to change to ARM64_FEATURE_GET(). In any case:
>
> Reviewed-by: Ricardo Koller <ricarkol@xxxxxxxxxx>
>
> (also assuming it includes the commit message clarification about reset
> clearing all registers).
Yes, I will fix those in V2.
Thank you for the review!
Reiji
