Re: Guest IA32_SPEC_CTRL on AMD hosts without X86_FEATURE_V_SPEC_CTRL

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On Sat, Sep 3, 2022 at 4:50 PM Josh Poimboeuf <jpoimboe@xxxxxxxxxx> wrote:

> [*] Not 100% true - if STIBP gets disabled by the guest, there's a small
>     window of opportunity where the SMT sibling can help force a
>     retbleed attack on a RET between the MSR write and the vmrun.  But
>     that's really unrealistic IMO.

That was my concern. How big does that window have to be before a
cross-thread attack becomes realistic, and how do we ensure that the
window never gets that large?



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