https://bugzilla.kernel.org/show_bug.cgi?id=216033 --- Comment #2 from Eric Li (ercli@xxxxxxxxxxx) --- @Sean Christopherson Thanks for submitting the fix to this bug in https://lore.kernel.org/lkml/20220607213604.3346000-4-seanjc@xxxxxxxxxx/ . However, I recently tested this fix and the behavior is not as expected. According to Intel's SDM, VMXON may generate 2 types of exceptions: IF (register operand) or (CR0.PE = 0) or (CR4.VMXE = 0) or ... THEN #UD; ELSIF not in VMX operation THEN IF (CPL > 0) or (in A20M mode) or (the values of CR0 and CR4 are not supported in VMX operation ... THEN #GP(0); For example, when CR4 value is incorrect, different exceptions may be generated depending on which bit is incorrect. If CR4.VMXE = 0, #UD should be generated. Otherwise, #GP(0) should be generated. However, after the fix, #UD is always generated. -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
