On Tue, Aug 30, 2022, Jim Mattson wrote:
> Intel enumerates support for PSFD in CPUID.(EAX=7,ECX=2):EDX.PSFD[bit
> 0]. Report support for this feature in KVM if it is available on the
> host.
>
> Presumably, this feature bit, like its AMD counterpart, is not welcome
> in cpufeatures.h, so add a local definition of this feature in KVM.
>
> Signed-off-by: Jim Mattson <jmattson@xxxxxxxxxx>
> ---
> arch/x86/kvm/cpuid.c | 23 +++++++++++++++++------
> 1 file changed, 17 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 07be45c5bb93..b5af9e451bef 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -62,6 +62,7 @@ u32 xstate_required_size(u64 xstate_bv, bool compacted)
> * This one is tied to SSB in the user API, and not
> * visible in /proc/cpuinfo.
> */
> +#define KVM_X86_FEATURE_PSFD 0 /* Predictive Store Forwarding Disable */
I believe we can use "enum kvm_only_cpuid_leafs" to handle this. E.g.
enum kvm_only_cpuid_leafs {
CPUID_12_EAX = NCAPINTS,
CPUID_7_2_EDX,
NR_KVM_CPU_CAPS,
NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
};
then the intended use of KVM_X86_FEATURE_*
#define KVM_X86_FEATURE_PSFD KVM_X86_FEATURE(CPUID_7_2_EDX, 0)
I _think_ we can then define an arbitrary word for X86_FEATURE_PSFD, e.g.
#define X86_FEATURE_PSFD (NKVMCAPINTS*32+0)
and then wire up the translation:
static __always_inline u32 __feature_translate(int x86_feature)
{
if (x86_feature == X86_FEATURE_SGX1)
return KVM_X86_FEATURE_SGX1;
else if (x86_feature == X86_FEATURE_SGX2)
return KVM_X86_FEATURE_SGX2;
else if (x86_feature == X86_FEATURE_PSFD)
return KVM_X86_FEATURE_PSFD;
return x86_feature;
}
I believe/hope that allows us to use at least cpuid_entry_override(). Open coding
masking of specific registers was a mess that I don't want to repeat.
