Hi! I just noticed that this test fails when the AVIC is enabled. It seems that it exposes actual shortcomings in the AVIC hardware implementation, although these should not matter in real life usage of it. First of all it seems that AVIC just allows to set the APIC_ICR_BUSY bit (it should be read-only) and it never clears it if set. Second AVIC seems to drop writes to low 24 bits of to ICR2, because these are not really used, although technically not marked as reserved in the spec (though APIC_ID register in AMD spec, states explicity that only bits 24-31 can be set, and the rest are reserved). And finally AVIC inhibit when x2apic is exposed to the guest was recently removed, because in this case AVIC also works just fine (but with msr emulation) and that means that we don't need anymore to hide x2apic from the guest to avoid AVIC inhibit. Best regards, Maxim Levitsky
