From: Like Xu <likexu@xxxxxxxxxxx> On virtual platforms without PDCM support (e.g. AMD), #GP failure on MSR_IA32_PERF_CAPABILITIES is completely avoidable. Signed-off-by: Like Xu <likexu@xxxxxxxxxxx> --- x86/pmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/x86/pmu.c b/x86/pmu.c index 4eb92d8..25fafbe 100644 --- a/x86/pmu.c +++ b/x86/pmu.c @@ -669,7 +669,8 @@ int main(int ac, char **av) check_counters(); - if (rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES) { + if (this_cpu_has(X86_FEATURE_PDCM) && + (rdmsr(MSR_IA32_PERF_CAPABILITIES) & PMU_CAP_FW_WRITES)) { gp_counter_base = MSR_IA32_PMC0; report_prefix_push("full-width writes"); check_counters(); -- 2.37.2