On 10.08.2022 08:12, Santosh Shukla wrote:
Inject the NMI by setting V_NMI in the VMCB interrupt control. processor
will clear V_NMI to acknowledge processing has started and will keep the
V_NMI_MASK set until the processor is done with processing the NMI event.
Signed-off-by: Santosh Shukla <santosh.shukla@xxxxxxx>
---
v3:
- Removed WARN_ON check.
v2:
- Added WARN_ON check for vnmi pending.
- use `get_vnmi_vmcb` to get correct vmcb so to inject vnmi.
arch/x86/kvm/svm/svm.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index e260e8cb0c81..8c4098b8a63e 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -3479,7 +3479,14 @@ static void pre_svm_run(struct kvm_vcpu *vcpu)
static void svm_inject_nmi(struct kvm_vcpu *vcpu)
{
struct vcpu_svm *svm = to_svm(vcpu);
+ struct vmcb *vmcb = NULL;
+ if (is_vnmi_enabled(svm)) {
I guess this should be "is_vnmi_enabled(svm) && !svm->nmi_l1_to_l2"
since if nmi_l1_to_l2 is true then the NMI to be injected originally
comes from L1's VMCB12 EVENTINJ field.
As you said in the cover letter, this field has different semantics
than vNMI - specifically, it should allow injecting even if L2 is in
NMI blocking state (it's then up to L1 to keep track of NMI injectability
for its L2 guest - so L0 should be transparently injecting it when L1
wants so).
+ vmcb = get_vnmi_vmcb(svm);
+ vmcb->control.int_ctl |= V_NMI_PENDING;
+ ++vcpu->stat.nmi_injections;
+ return;
+ }
svm->vmcb->control.event_inj = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
if (svm->nmi_l1_to_l2)
Thanks,
Maciej
