Changes since v4: - Rebase to the latest kvm/queue (93472b797153). - Add "KVM: VMX: Don't toggle VM_ENTRY_IA32E_MODE for 32-bit kernels/KVM" [Sean]. - Use "__always_inline" [Sean, Nathan, Paolo]. - Collect R-b tags [Max, Sean, Kai]. - Use two-dimentional 'evmcs_unsupported_ctls' array in PATCH 09 [Paolo]. - Numerous indentation fixes [Sean]. - KVM_{REQ,OPT}_VMX_* -> KVM_{REQUIRED,OPTIONAL}_VMX_* [Sean]. - Minor changes to commit messages, comments,... [Sean, Max]. Original description: Enlightened VMCS v1 definition was updates to include fields for the following features: - PerfGlobalCtrl - EnclsExitingBitmap - TSC scaling - GuestLbrCtl - CET - SSP While the information is missing in the publicly available TLFS, the updated definition comes with a new feature bit in CPUID.0x4000000A.EBX (BIT 0). Use a made up HV_X64_NESTED_EVMCS1_2022_UPDATE name for it. Add support for the new revision to KVM. SSP, CET and GuestLbrCtl features are not currently supported by KVM. While on it, implement Sean's idea to use vmcs_config for setting up L1 VMX control MSRs instead of re-reading host MSRs. Jim Mattson (1): KVM: x86: VMX: Replace some Intel model numbers with mnemonics Sean Christopherson (2): KVM: VMX: Don't toggle VM_ENTRY_IA32E_MODE for 32-bit kernels/KVM KVM: VMX: Adjust CR3/INVPLG interception for EPT=y at runtime, not setup Vitaly Kuznetsov (23): KVM: x86: hyper-v: Expose access to debug MSRs in the partition privilege flags x86/hyperv: Fix 'struct hv_enlightened_vmcs' definition x86/hyperv: Update 'struct hv_enlightened_vmcs' definition KVM: VMX: Define VMCS-to-EVMCS conversion for the new fields KVM: nVMX: Support several new fields in eVMCSv1 KVM: x86: hyper-v: Cache HYPERV_CPUID_NESTED_FEATURES CPUID leaf KVM: selftests: Add ENCLS_EXITING_BITMAP{,HIGH} VMCS fields KVM: selftests: Switch to updated eVMCSv1 definition KVM: VMX: nVMX: Support TSC scaling and PERF_GLOBAL_CTRL with enlightened VMCS KVM: selftests: Enable TSC scaling in evmcs selftest KVM: VMX: Get rid of eVMCS specific VMX controls sanitization KVM: VMX: Check VM_ENTRY_IA32E_MODE in setup_vmcs_config() KVM: VMX: Check CPU_BASED_{INTR,NMI}_WINDOW_EXITING in setup_vmcs_config() KVM: VMX: Tweak the special handling of SECONDARY_EXEC_ENCLS_EXITING in setup_vmcs_config() KVM: VMX: Extend VMX controls macro shenanigans KVM: VMX: Move CPU_BASED_CR8_{LOAD,STORE}_EXITING filtering out of setup_vmcs_config() KVM: VMX: Add missing VMEXIT controls to vmcs_config KVM: VMX: Add missing CPU based VM execution controls to vmcs_config KVM: VMX: Move LOAD_IA32_PERF_GLOBAL_CTRL errata handling out of setup_vmcs_config() KVM: nVMX: Always set required-1 bits of pinbased_ctls to PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR KVM: nVMX: Use sanitized allowed-1 bits for VMX control MSRs KVM: VMX: Cache MSR_IA32_VMX_MISC in vmcs_config KVM: nVMX: Use cached host MSR_IA32_VMX_MISC value for setting up nested MSR arch/x86/include/asm/hyperv-tlfs.h | 30 +- arch/x86/include/asm/kvm_host.h | 2 + arch/x86/kvm/hyperv.c | 20 +- arch/x86/kvm/vmx/capabilities.h | 14 +- arch/x86/kvm/vmx/evmcs.c | 127 +++++++-- arch/x86/kvm/vmx/evmcs.h | 18 +- arch/x86/kvm/vmx/nested.c | 70 +++-- arch/x86/kvm/vmx/nested.h | 2 +- arch/x86/kvm/vmx/vmx.c | 256 ++++++++---------- arch/x86/kvm/vmx/vmx.h | 162 +++++++++-- include/asm-generic/hyperv-tlfs.h | 2 + .../selftests/kvm/include/x86_64/evmcs.h | 45 ++- .../selftests/kvm/include/x86_64/vmx.h | 2 + .../testing/selftests/kvm/x86_64/evmcs_test.c | 31 ++- 14 files changed, 521 insertions(+), 260 deletions(-) -- 2.35.3