On Wed, 2022-07-13 at 17:05 +0200, Vitaly Kuznetsov wrote: > Normally, genuine Hyper-V doesn't expose architectural invariant TSC > (CPUID.80000007H:EDX[8]) to its guests by default. A special PV MSR > (HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x40000118) and corresponding CPUID > feature bit (CPUID.0x40000003.EAX[15]) were introduced. When bit 0 of the > PV MSR is set, invariant TSC bit starts to show up in CPUID. When the > feature is exposed to Hyper-V guests, reenlightenment becomes unneeded. If I understood the feature correctly from the code, it allows the HyperV, or in this case KVM acting as HyperV, to avoid unconditionally exposing the invltsc bit in CPUID, but rather let the guest know that it can opt-in into this, by giving the guest another CPUID bit to indicate this ability and a MSR which the guest uses to opt-in. Are there known use cases of this, are there guests which won't opt-in? > > Note: strictly speaking, KVM doesn't have to have the feature as exposing > raw invariant TSC bit (CPUID.80000007H:EDX[8]) also seems to work for > modern Windows versions. The feature is, however, tiny and straitforward > and gives additional flexibility so why not. This means that KVM can also just unconditionally expose the invtsc bit to the guest, and the guest still uses it. Nitpick: It might be worth it to document it a bit better somewhere, as I tried to do in this mail. Best regards, Maxim Levitsky > > Vitaly Kuznetsov (3): > KVM: x86: Hyper-V invariant TSC control > KVM: selftests: Fix wrmsr_safe() > KVM: selftests: Test Hyper-V invariant TSC control > > arch/x86/include/asm/kvm_host.h | 1 + > arch/x86/kvm/cpuid.c | 7 ++ > arch/x86/kvm/hyperv.c | 19 +++++ > arch/x86/kvm/hyperv.h | 15 ++++ > arch/x86/kvm/x86.c | 4 +- > .../selftests/kvm/include/x86_64/processor.h | 2 +- > .../selftests/kvm/x86_64/hyperv_features.c | 73 ++++++++++++++++++- > 7 files changed, 115 insertions(+), 6 deletions(-) >
