On Tue, Jun 14, 2022 at 1:47 PM Sean Christopherson <seanjc@xxxxxxxxxx> wrote: > > Don't check for code breakpoints during instruction emulation if the > emulation was triggered by exception interception. Code breakpoints are > the highest priority fault-like exception, and KVM only emulates on > exceptions that are fault-like. Thus, if hardware signaled a different > exception, then the vCPU is already passed the stage of checking for > hardware breakpoints. > > This is likely a glorified nop in terms of functionality, and is more for > clarification and is technically an optimization. Intel's SDM explicitly > states vmcs.GUEST_RFLAGS.RF on exception interception is the same as the > value that would have been saved on the stack had the exception not been > intercepted, i.e. will be '1' due to all fault-like exceptions setting RF > to '1'. AMD says "guest state saved ... is the processor state as of the > moment the intercept triggers", but that begs the question, "when does > the intercept trigger?". IIRC, AMD does not prematurely clobber EFLAGS.RF on an intercepted exception. This is actually a big deal with shadow paging. On Intel, the hypervisor can't fully squash a #PF and restart the guest instruction after filling in the shadow page table entry...not easily, anyway. (OTOH, AMD does prematurely clobber DR6 and DR7 on an intercepted #DB. So, no one should be celebrating!)
