+Venkatesh On Thu, Jun 23, 2022, Chao Gao wrote: > On Thu, Jun 23, 2022 at 05:45:11PM +0800, Zeng Guang wrote: > >Hardware would directly write x2APIC ICR register instead of software > >emulation in some circumstances, e.g when Intel IPI virtualization is > >enabled. This behavior requires normal reserved bits checking to ensure > >them input as zero, otherwise it will cause #GP. So we need mask out > >those reserved bits from the data written to vICR register. > > OK. One open is: > > Current KVM doesn't emulate this #GP. Is there any historical reason? > if no, we will fix KVM and add some tests to verify this #GP is > correctly emulated. It's a bug. There are patches posted[*], but they need to be refreshed to fix a rebase goof. Venkatesh, are you planning on sending a v3 soonish? [*] https://lore.kernel.org/all/20220525173933.1611076-1-venkateshs@xxxxxxxxxxxx
