From: Lai Jiangshan <jiangshan.ljs@xxxxxxxxxxxx> Add EPT PTEs into the comments. Signed-off-by: Lai Jiangshan <jiangshan.ljs@xxxxxxxxxxxx> --- arch/x86/kvm/mmu/paging_tmpl.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h index 2375bd5fd9f4..f4e02ba04744 100644 --- a/arch/x86/kvm/mmu/paging_tmpl.h +++ b/arch/x86/kvm/mmu/paging_tmpl.h @@ -16,8 +16,8 @@ */ /* - * We need the mmu code to access both 32-bit and 64-bit guest ptes, - * so the code in this file is compiled twice, once per pte size. + * We need the MMU code to access 32-bit, 64-bit PTEs and 64-bit EPT PTEs, + * so the code in this file is compiled three times, once per a kind of PTE. */ #if PTTYPE == 64 -- 2.19.1.6.gb485710b
