S390x CPU Topology allows a non uniform repartition of the CPU
inside the topology containers, sockets, books and drawers.
We use numa to place the CPU inside the right topology container
and report the non uniform topology to the guest.
Note that s390x needs CPU0 to belong to the topology and consequently
all topology must include CPU0.
We accept a partial QEMU numa definition, in that case undefined CPUs
are added to free slots in the topology starting with slot 0 and going
up.
Signed-off-by: Pierre Morel <pmorel@xxxxxxxxxxxxx>
---
hw/core/machine.c | 18 ++++++++++
hw/s390x/s390-virtio-ccw.c | 68 ++++++++++++++++++++++++++++++++++----
2 files changed, 79 insertions(+), 7 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index b67f213654..e9847693f0 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -689,6 +689,16 @@ void machine_set_cpu_numa_node(MachineState *machine,
return;
}
+ if (props->has_book_id && !slot->props.has_book_id) {
+ error_setg(errp, "book-id is not supported");
+ return;
+ }
+
+ if (props->has_drawer_id && !slot->props.has_drawer_id) {
+ error_setg(errp, "drawer-id is not supported");
+ return;
+ }
+
/* skip slots with explicit mismatch */
if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
continue;
@@ -706,6 +716,14 @@ void machine_set_cpu_numa_node(MachineState *machine,
continue;
}
+ if (props->has_book_id && props->book_id != slot->props.book_id) {
+ continue;
+ }
+
+ if (props->has_drawer_id && props->drawer_id != slot->props.drawer_id) {
+ continue;
+ }
+
/* reject assignment if slot is already assigned, for compatibility
* of legacy cpu_index mapping with SPAPR core based mapping do not
* error out if cpu thread and matched core have the same node-id */
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index 2839c24833..93d1a43583 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -84,14 +84,34 @@ out:
static void s390_init_cpus(MachineState *machine)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
- int i;
+ CPUArchId *slot;
+ int i, n = 0;
/* initialize possible_cpus */
mc->possible_cpu_arch_ids(machine);
s390_topology_setup(machine);
- for (i = 0; i < machine->smp.cpus; i++) {
+
+ /* For NUMA configuration create defined nodes */
+ if (machine->numa_state->num_nodes) {
+ for (i = 0; i < machine->smp.max_cpus; i++) {
+ slot = &machine->possible_cpus->cpus[i];
+ if (slot->arch_id != -1 && n < machine->smp.cpus) {
+ s390x_new_cpu(machine->cpu_type, i, &error_fatal);
+ n++;
+ }
+ }
+ }
+
+ /* create all remaining CPUs */
+ for (i = 0; n < machine->smp.cpus && i < machine->smp.max_cpus; i++) {
+ slot = &machine->possible_cpus->cpus[i];
+ /* For NUMA configuration skip defined nodes */
+ if (machine->numa_state->num_nodes && slot->arch_id != -1) {
+ continue;
+ }
s390x_new_cpu(machine->cpu_type, i, &error_fatal);
+ n++;
}
}
@@ -274,6 +294,11 @@ static void ccw_init(MachineState *machine)
/* register hypercalls */
virtio_ccw_register_hcalls();
+ /* CPU0 must exist on S390x */
+ if (!s390_cpu_addr2state(0)) {
+ error_printf("Core_id 0 must be defined in the CPU configuration\n");
+ exit(1);
+ }
s390_enable_css_support(s390_cpu_addr2state(0));
ret = css_create_css_image(VIRTUAL_CSSID, true);
@@ -306,6 +331,7 @@ static void s390_cpu_plug(HotplugHandler *hotplug_dev,
g_assert(!ms->possible_cpus->cpus[cpu->env.core_id].cpu);
ms->possible_cpus->cpus[cpu->env.core_id].cpu = OBJECT(dev);
+ ms->possible_cpus->cpus[cpu->env.core_id].arch_id = cpu->env.core_id;
s390_topology_new_cpu(cpu->env.core_id);
@@ -529,7 +555,9 @@ static CpuInstanceProperties s390_cpu_index_to_props(MachineState *ms,
static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms)
{
int i;
+ int drawer_id, book_id, socket_id;
unsigned int max_cpus = ms->smp.max_cpus;
+ CPUArchId *slot;
if (ms->possible_cpus) {
g_assert(ms->possible_cpus && ms->possible_cpus->len == max_cpus);
@@ -540,11 +568,25 @@ static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms)
sizeof(CPUArchId) * max_cpus);
ms->possible_cpus->len = max_cpus;
for (i = 0; i < ms->possible_cpus->len; i++) {
- ms->possible_cpus->cpus[i].type = ms->cpu_type;
- ms->possible_cpus->cpus[i].vcpus_count = 1;
- ms->possible_cpus->cpus[i].arch_id = i;
- ms->possible_cpus->cpus[i].props.has_core_id = true;
- ms->possible_cpus->cpus[i].props.core_id = i;
+ slot = &ms->possible_cpus->cpus[i];
+
+ slot->type = ms->cpu_type;
+ slot->vcpus_count = 1;
+ slot->arch_id = i;
+ slot->props.has_core_id = true;
+ slot->props.core_id = i;
+
+ socket_id = i / ms->smp.cores;
+ slot->props.socket_id = socket_id;
+ slot->props.has_socket_id = true;
+
+ book_id = socket_id / ms->smp.sockets;
+ slot->props.book_id = book_id;
+ slot->props.has_book_id = true;
+
+ drawer_id = book_id / ms->smp.books;
+ slot->props.drawer_id = drawer_id;
+ slot->props.has_drawer_id = true;
}
return ms->possible_cpus;
@@ -586,6 +628,17 @@ static ram_addr_t s390_fixup_ram_size(ram_addr_t sz)
return newsz;
}
+/*
+ * S390 defines CPU topology level 2 as the level for which a change in topology
+ * is worth being taking care of.
+ * Let use level 2, socket, as the numa node.
+ */
+static int64_t s390_get_default_cpu_node_id(const MachineState *ms, int idx)
+{
+ ms->possible_cpus->cpus[idx].arch_id = -1;
+ return idx / ms->smp.cores;
+}
+
static void ccw_machine_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -618,6 +671,7 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data)
mc->default_ram_id = "s390.ram";
mc->smp_props.books_supported = true;
mc->smp_props.drawers_supported = true;
+ mc->get_default_cpu_node_id = s390_get_default_cpu_node_id;
}
static inline bool machine_get_aes_key_wrap(Object *obj, Error **errp)
--
2.27.0
