On Tue, Apr 19, 2022 at 03:53:52PM -0500, Babu Moger wrote: > The TSC_AUX Virtualization feature allows AMD SEV-ES guests to securely use > TSC_AUX (auxiliary time stamp counter data) MSR in RDTSCP and RDPID > instructions. > > The TSC_AUX MSR is typically initialized to APIC ID or another unique > identifier so that software can quickly associate returned TSC value > with the logical processor. > > Add the feature bit and also include it in the kvm for detection. > > Signed-off-by: Babu Moger <babu.moger@xxxxxxx> > Acked-by: Borislav Petkov <bp@xxxxxxx> > --- > v2: > Fixed the text(commented by Boris). > Added Acked-by from Boris. > > v1: > https://lore.kernel.org/kvm/164937947020.1047063.14919887750944564032.stgit@bmoger-ubuntu/ > > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/kvm/cpuid.c | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index 73e643ae94b6..1bc66a17a95a 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -405,6 +405,7 @@ > #define X86_FEATURE_SEV (19*32+ 1) /* AMD Secure Encrypted Virtualization */ > #define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* "" VM Page Flush MSR is supported */ > #define X86_FEATURE_SEV_ES (19*32+ 3) /* AMD Secure Encrypted Virtualization - Encrypted State */ > +#define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* Virtual TSC_AUX */ I forgot from the last time: nothing is going to use that bit in userspace so make that #define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* "" Virtual TSC_AUX */ please. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
