On Tue, Apr 12, 2022 at 02:12:55PM +0100, Marc Zyngier wrote: > The ISS field exposed by ESR_ELx contain two additional subfields > with FEAT_WFxT: > > - RN, the register number containing the timeout > - RV, indicating if the register number is valid > > Describe these two fields according to the arch spec. > > No functional change. > > Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> > --- > arch/arm64/include/asm/esr.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > index 65c2201b11b2..15156c478054 100644 > --- a/arch/arm64/include/asm/esr.h > +++ b/arch/arm64/include/asm/esr.h > @@ -133,6 +133,8 @@ > #define ESR_ELx_CV (UL(1) << 24) > #define ESR_ELx_COND_SHIFT (20) > #define ESR_ELx_COND_MASK (UL(0xF) << ESR_ELx_COND_SHIFT) > +#define ESR_ELx_WFx_ISS_RN (UL(0x1F) << 5) > +#define ESR_ELx_WFx_ISS_RV (UL(1) << 2) > #define ESR_ELx_WFx_ISS_TI (UL(3) << 0) > #define ESR_ELx_WFx_ISS_WFxT (UL(2) << 0) > #define ESR_ELx_WFx_ISS_WFI (UL(0) << 0) Reviewed-by: Joey Gouly <joey.gouly@xxxxxxx>
