> On Apr 12, 2022, at 2:04 PM, Pawan Gupta <pawan.kumar.gupta@xxxxxxxxxxxxxxx> wrote: > > On Tue, Apr 12, 2022 at 04:08:32PM +0000, Jon Kohler wrote: >> >> >>> On Apr 12, 2022, at 11:54 AM, Dave Hansen <dave.hansen@xxxxxxxxx> wrote: >>> >>> On 4/12/22 06:36, Jon Kohler wrote: >>>> So my theory here is to extend the logical effort of the microcode driven >>>> automatic disablement as well as the tsx=auto automatic disablement and >>>> have tsx=on force abort all transactions on X86_BUG_TAA SKUs, but leave >>>> the CPU features enumerated to maintain live migration. >>>> >>>> This would still leave TSX totally good on Ice Lake / non-buggy systems. >>>> >>>> If it would help, I'm working up an RFC patch, and we could discuss there? >>> >>> Sure. But, it sounds like you really want a new tdx=something rather >>> than to muck with tsx=on behavior. Surely someone else will come along >>> and complain that we broke their TDX setup if we change its behavior. >> >> Good point, there will always be a squeaky wheel. I’ll work that into the RFC, >> I’ll do something like tsx=compat and see how it shapes up. > > FYI, the original series had tsx=fake, that would have taken care of > this breakage. Fake sounds way better than compat, which is what I had :) My RFC code looks similar to your patch, I’ll combine the approaches and send it out shortly, almost done > > https://urldefense.proofpoint.com/v2/url?u=https-3A__lore.kernel.org_lkml_de6b97a567e273adff1f5268998692bad548aa10.1623272033.git-2Dseries.pawan.kumar.gupta-40linux.intel.com_&d=DwIDaQ&c=s883GpUCOChKOHiocYtGcg&r=NGPRGGo37mQiSXgHKm5rCQ&m=AgPWHzCORdn5x5rYXE0QeJ2yf158HOjDA5Bn8udzp-m6i9V9s7S_jtSiLog-dk93&s=kR74kfovpa0zOK0tZ2Ss9xbg2aRLI5oocB_cp_6DLkg&e= > For the lack of real world use-cases at that time, this patch was dropped. > > Thanks, > Pawan
