On Tue, 2022-03-08 at 10:39 -0600, Suravee Suthikulpanit wrote: > Refactor the current logic for (de)activate AVIC into helper functions, > and also add logic for (de)activate x2AVIC. The helper function are used > when initializing AVIC and switching from AVIC to x2AVIC mode > (handled by svm_refresh_spicv_exec_ctrl()). > > When an AVIC-enabled guest switches from APIC to x2APIC mode during > runtime, the SVM driver needs to perform the following steps: > > 1. Set the x2APIC mode bit for AVIC in VMCB along with the maximum > APIC ID support for each mode accodingly. > > 2. Disable x2APIC MSRs interception in order to allow the hardware > to virtualize x2APIC MSRs accesses. > > Reported-by: kernel test robot <lkp@xxxxxxxxx> > Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx> > --- > arch/x86/include/asm/svm.h | 1 + > arch/x86/kvm/svm/avic.c | 48 ++++++++++++++++++++++++++++++++++---- > 2 files changed, 44 insertions(+), 5 deletions(-) > > diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h > index 681a348a9365..f5337022104d 100644 > --- a/arch/x86/include/asm/svm.h > +++ b/arch/x86/include/asm/svm.h > @@ -248,6 +248,7 @@ enum avic_ipi_failure_cause { > AVIC_IPI_FAILURE_INVALID_BACKING_PAGE, > }; > > +#define AVIC_PHYSICAL_MAX_INDEX_MASK GENMASK_ULL(9, 0) > > /* > * For AVIC, the max index allowed for physical APIC ID > diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c > index 53559b8dfa52..b8d6bf6b6ed5 100644 > --- a/arch/x86/kvm/svm/avic.c > +++ b/arch/x86/kvm/svm/avic.c > @@ -66,6 +66,45 @@ struct amd_svm_iommu_ir { > void *data; /* Storing pointer to struct amd_ir_data */ > }; > > +static inline void avic_set_x2apic_msr_interception(struct vcpu_svm *svm, bool disable) > +{ > + int i; > + > + for (i = 0x800; i <= 0x8ff; i++) > + set_msr_interception(&svm->vcpu, svm->msrpm, i, > + !disable, !disable); > +} > + > +static void avic_activate_vmcb(struct vcpu_svm *svm) > +{ > + struct vmcb *vmcb = svm->vmcb01.ptr; > + > + vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK); > + vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK; This looks a bit better, I don't 100% like this but let it be. Honestly I will eventualy add code to calculate and update this maximum dynamically to avoid wasting microcode going over the whole table, or worse having nested avic code doing so. > + > + vmcb->control.int_ctl |= AVIC_ENABLE_MASK; > + if (apic_x2apic_mode(svm->vcpu.arch.apic)) { > + vmcb->control.int_ctl |= X2APIC_MODE_MASK; > + vmcb->control.avic_physical_id |= X2AVIC_MAX_PHYSICAL_ID; > + /* Disabling MSR intercept for x2APIC registers */ > + avic_set_x2apic_msr_interception(svm, false); > + } else { > + vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID; > + /* Enabling MSR intercept for x2APIC registers */ > + avic_set_x2apic_msr_interception(svm, true); > + } > +} > + > +static void avic_deactivate_vmcb(struct vcpu_svm *svm) > +{ > + struct vmcb *vmcb = svm->vmcb01.ptr; > + > + vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK); > + vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK; > + > + /* Enabling MSR intercept for x2APIC registers */ > + avic_set_x2apic_msr_interception(svm, true); > +} Makes sense. > > /* Note: > * This function is called from IOMMU driver to notify > @@ -183,13 +222,12 @@ void avic_init_vmcb(struct vcpu_svm *svm) > vmcb->control.avic_backing_page = bpa & AVIC_HPA_MASK; > vmcb->control.avic_logical_id = lpa & AVIC_HPA_MASK; > vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK; > - vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID; > vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE & VMCB_AVIC_APIC_BAR_MASK; > > if (kvm_apicv_activated(svm->vcpu.kvm)) > - vmcb->control.int_ctl |= AVIC_ENABLE_MASK; > + avic_activate_vmcb(svm); > else > - vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK; > + avic_deactivate_vmcb(svm); > } > > static u64 *avic_get_physical_id_entry(struct kvm_vcpu *vcpu, > @@ -703,9 +741,9 @@ void svm_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu) > * accordingly before re-activating. > */ > avic_post_state_restore(vcpu); > - vmcb->control.int_ctl |= AVIC_ENABLE_MASK; > + avic_activate_vmcb(svm); > } else { > - vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK; > + avic_deactivate_vmcb(svm); > } > vmcb_mark_dirty(vmcb, VMCB_AVIC); > Reviewed-by: Maxim Levitsky <mlevitsk@xxxxxxxxxx> Best regards, Maxim Levitsky