On Fri, 18 Mar 2022 14:27:33 -0300 Jason Gunthorpe <jgg@xxxxxxxxxx> wrote: > +static int conv_iommu_prot(u32 map_flags) > +{ > + int iommu_prot; > + > + /* > + * We provide no manual cache coherency ioctls to userspace and most > + * architectures make the CPU ops for cache flushing privileged. > + * Therefore we require the underlying IOMMU to support CPU coherent > + * operation. > + */ > + iommu_prot = IOMMU_CACHE; Where is this requirement enforced? AIUI we'd need to test IOMMU_CAP_CACHE_COHERENCY somewhere since functions like intel_iommu_map() simply drop the flag when not supported by HW. This also seems like an issue relative to vfio compatibility that I don't see mentioned in that patch. Thanks, Alex > + if (map_flags & IOMMU_IOAS_MAP_WRITEABLE) > + iommu_prot |= IOMMU_WRITE; > + if (map_flags & IOMMU_IOAS_MAP_READABLE) > + iommu_prot |= IOMMU_READ; > + return iommu_prot; > +}