ROM BAR can be handled same as regular BAR:
load_option_roms utility will take care of
copying it to RAM as appropriate.
Signed-off-by: Michael S. Tsirkin <mst@xxxxxxxxxx>
---
Changes from v1: made ROM BAR read-only.
hw/device-assignment.c | 23 +++++++++++------------
1 files changed, 11 insertions(+), 12 deletions(-)
diff --git a/hw/device-assignment.c b/hw/device-assignment.c
index 000fa61..0c3c8f4 100644
--- a/hw/device-assignment.c
+++ b/hw/device-assignment.c
@@ -233,7 +233,8 @@ static void assigned_dev_iomem_map_slow(PCIDevice *pci_dev, int region_num,
int m;
DEBUG("slow map\n");
- m = cpu_register_io_memory(slow_bar_read, slow_bar_write, region);
+ m = cpu_register_io_memory(slow_bar_read, region_num == PCI_ROM_SLOT ?
+ NULL : slow_bar_write, region);
cpu_register_physical_memory(e_phys, e_size, m);
/* MSI-X MMIO page */
@@ -486,25 +487,23 @@ static int assigned_dev_register_regions(PCIRegion *io_regions,
: PCI_BASE_ADDRESS_SPACE_MEMORY;
if (cur_region->size & 0xFFF) {
- fprintf(stderr, "PCI region %d at address 0x%llx "
- "has size 0x%x, which is not a multiple of 4K. "
- "You might experience some performance hit due to that.\n",
- i, (unsigned long long)cur_region->base_addr,
- cur_region->size);
+ if (i != PCI_ROM_SLOT) {
+ fprintf(stderr, "PCI region %d at address 0x%llx "
+ "has size 0x%x, which is not a multiple of 4K. "
+ "You might experience some performance hit "
+ "due to that.\n",
+ i, (unsigned long long)cur_region->base_addr,
+ cur_region->size);
+ }
slow_map = 1;
}
- if (slow_map && (i == PCI_ROM_SLOT)) {
- fprintf(stderr, "ROM not aligned - can't continue\n");
- return -1;
- }
-
/* map physical memory */
pci_dev->v_addrs[i].e_physbase = cur_region->base_addr;
if (i == PCI_ROM_SLOT) {
pci_dev->v_addrs[i].u.r_virtbase =
mmap(NULL,
- (cur_region->size + 0xFFF) & 0xFFFFF000,
+ cur_region->size,
PROT_WRITE | PROT_READ, MAP_ANONYMOUS | MAP_PRIVATE,
0, (off_t) 0);
--
1.6.6.rc1.43.gf55cc
--
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