Reviewed-by: David Dunn <daviddunn@xxxxxxxxxx> On Wed, Feb 2, 2022 at 5:52 PM Jim Mattson <jmattson@xxxxxxxxxx> wrote: > > AMD's event select is 3 nybbles, with the high nybble in bits 35:32 of > a PerfEvtSeln MSR. Don't drop the high nybble when setting up the > config field of a perf_event_attr structure for a call to > perf_event_create_kernel_counter().