On Mon, Dec 21, 2009 at 6:22 AM, Alexander Graf <agraf@xxxxxxx> wrote: > We treated the DEC interrupt like an edge based one. This is not true for > Book3s. The DEC keeps firing until mtdec is issued again and thus clears > the interrupt line. That's not quite right. The decrementer keeps firing until the top bit is cleared, i.e. with mtdec. However, not *every* mtdec clears it. (Also, I'm pretty sure this varies between Book 3S implementations, e.g. 970 behaves differently than POWERn. I don't remember specific values of <n> though, and I could be misremembering...) So is this the failure mode? - a decrementer interrupt is delivered - guest does *not* issue mtdec to clear it (ppc64's lazy interrupt disabling?) - guest expects a second decrementer interrupt, but KVM doesn't deliver one In that case, it seems like the real fix would be something like this: void kvmppc_emulate_dec(struct kvm_vcpu *vcpu) { unsigned long dec_nsec; pr_debug("mtDEC: %x\n", vcpu->arch.dec); #ifdef CONFIG_PPC64 /* POWER4+ triggers a dec interrupt if the value is < 0 */ if (vcpu->arch.dec & 0x80000000) { hrtimer_try_to_cancel(&vcpu->arch.dec_timer); kvmppc_core_queue_dec(vcpu); + /* keep queuing interrupts until guest clears high MSR bit */ + hrtimer_start(&vcpu->arch.dec_timer, ktime_set(0, 100), + HRTIMER_MODE_REL); return; } #endif -Hollis -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html