On Mon, 20 Dec 2021 07:11:03 +0000, Ganapatrao Kulkarni <gankulkarni@xxxxxxxxxxxxxxxxxxxxxx> wrote: > > Hi Marc, > > On 30-11-2021 01:31 am, Marc Zyngier wrote: > > From: Jintack Lim <jintack.lim@xxxxxxxxxx> > > > > Forward traps due to HCR_EL2.NV bit to the virtual EL2 if they are not > > coming from the virtual EL2 and the virtual HCR_EL2.NV bit is set. > > > > In addition to EL2 register accesses, setting NV bit will also make EL12 > > register accesses trap to EL2. To emulate this for the virtual EL2, > > forword traps due to EL12 register accessses to the virtual EL2 if the > > virtual HCR_EL2.NV bit is set. > > > > This is for recursive nested virtualization. > > What is recursive nested virtualization means? > Are we going to set NV/NV1/NV2 bits of ID_AA64MMFR2_EL1 of > Guest-Hypervisor to support NV in Guest-Hypervisor? Of course. An implementation of nested virtualisation that would stop at L1 would be pretty crap and fail to live up to the 'turtles all the way down' paradigm. Note that the recursive support is still a work in progress, as making it work for real in a software model is an exercise in futility (for example, we make no effort to make the VNCR_EL2 mapping work past L1). Once someone sends me a NV-capable box, I'll get it working. M. -- Without deviation from the norm, progress is not possible.
