> -----Original Message----- > From: Richard Henderson [mailto:richard.henderson@xxxxxxxxxx] > Sent: Sunday, November 21, 2021 6:19 AM > To: Jiangyifei <jiangyifei@xxxxxxxxxx>; qemu-devel@xxxxxxxxxx; > qemu-riscv@xxxxxxxxxx > Cc: bin.meng@xxxxxxxxxxxxx; limingwang (A) <limingwang@xxxxxxxxxx>; > kvm@xxxxxxxxxxxxxxx; libvir-list@xxxxxxxxxx; anup.patel@xxxxxxx; wanbo (G) > <wanbo13@xxxxxxxxxx>; Alistair Francis <alistair.francis@xxxxxxx>; > kvm-riscv@xxxxxxxxxxxxxxxxxxx; Wanghaibin (D) > <wanghaibin.wang@xxxxxxxxxx>; palmer@xxxxxxxxxxx; Fanliang (EulerOS) > <fanliang@xxxxxxxxxx>; Wubin (H) <wu.wubin@xxxxxxxxxx> > Subject: Re: [PATCH v1 03/12] target/riscv: Implement function > kvm_arch_init_vcpu > > On 11/20/21 8:46 AM, Yifei Jiang wrote: > > + id = kvm_riscv_reg_id(env, KVM_REG_RISCV_CONFIG, > KVM_REG_RISCV_CONFIG_REG(isa)); > > + ret = kvm_get_one_reg(cs, id, &isa); > > + if (ret) { > > + return ret; > > + } > > + env->misa_mxl |= isa; > > This doesn't look right. > I'm sure you meant > > env->misa_ext = isa; > > > r~ Thanks, it will be modified in the next series. Yifei
