On Thu, Nov 25, 2021, Paolo Bonzini wrote: > On 11/25/21 01:20, isaku.yamahata@xxxxxxxxx wrote: > > From: Sean Christopherson<sean.j.christopherson@xxxxxxxxx> > > > > Return true for kvm_vcpu_has_events() if the vCPU has a pending APICv > > interrupt to support TDX's usage of APICv. Unlike VMX, TDX doesn't have > > access to vmcs.GUEST_INTR_STATUS and so can't emulate posted interrupts, > > i.e. needs to generate a posted interrupt and more importantly can't > > manually move requested interrupts into the vIRR (which it also doesn't > > have access to). > > Does this mean it is impossible to disable APICv on TDX? If so, please add > a WARN. Yes, APICv is forced. Rereading this patch, checking only for a pending posted interrupt isn't correct, a pending interrupt that's below the PPR shouldn't be considered a wake event. A much better approach would be to have vt_sync_pir_to_irr() redirect to a TDX implementation to read the PIR but not update the vIRR, that way common x86 doesn't need to be touched. Hopefully that can be done in a race-free way.
