On 11/8/21 13:44, Lai Jiangshan wrote:
+/* + * VMX_REGS_AVAIL_SET - The set of registers that will be updated in cache on + * demand. Other registers not listed here are synced to + * the cache immediately after VM-Exit. + * + * VMX_REGS_DIRTY_SET - The set of registers that might be outdated in + * architecture. Other registers not listed here are synced + * to the architecture immediately when modifying.
Slightly more expressive: /* * VMX_REGS_LAZY_LOAD_SET - The set of registers that will be updated in the * cache on demand. Other registers not listed here are synced to * the cache immediately after VM-Exit. */ ... /* * VMX_REGS_LAZY_UPDATE_SET - The set of registers that might be outdated in * VMCS. Other registers not listed here are synced to the VMCS * immediately when modified. */ ... BUILD_BUG_ON(VMX_REGS_LAZY_UPDATE_SET & ~VMX_REGS_LAZY_LOAD_SET); vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET; vcpu->arch.regs_dirty &= ~VMX_REGS_LAZY_UPDATE_SET; That is lazily loaded registers become unavailable, and lazily updated registers become unavailable and dirty. Paolo