On 11/10/21 23:30, Ben Gardon wrote:
- WARN_ONCE(is_rsvd_spte(&vcpu->arch.mmu->shadow_zero_check, spte, level), + WARN_ONCE(is_rsvd_spte(shadow_zero_check, spte, level), "spte = 0x%llx, level = %d, rsvd bits = 0x%llx", spte, level, - get_rsvd_bits(&vcpu->arch.mmu->shadow_zero_check, spte, level)); + get_rsvd_bits(shadow_zero_check, spte, level));
Hmm, there is a deeper issue here, in that when using EPT/NPT (on either the legacy aka shadow or the TDP MMU) large parts of vcpu->arch.mmu are really the same for all vCPUs. The only thing that varies is those parts that actually depend on the guest's paging mode---the extended role, the reserved bits, etc. Those are needed by the emulator, but don't really belong in vcpu->arch.mmu when EPT/NPT is in use.
I wonder if there's room for splitting kvm_mmu in two parts, such as kvm_mmu and kvm_guest_paging_context, and possibly change the walk_mmu pointer into a pointer to kvm_guest_paging_context. This way the EPT/NPT MMU (again either shadow or TDP) can be moved to kvm->arch. It should simplify this series and also David's work on eager page splitting.
I'm not asking you to do this, of course, but perhaps I can trigger Sean's itch to refactor stuff. :)
Paolo
