On Wed, Aug 11, 2021, Chenyi Qiang wrote:
> @@ -202,14 +202,17 @@ static inline u8 permission_fault(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
> WARN_ON(pfec & (PFERR_PK_MASK | PFERR_RSVD_MASK));
> if (unlikely(mmu->pkr_mask)) {
> u32 pkr_bits, offset;
> + u64 pkr;
Heh, MSR_IA32_PKRS strikes again. This should be a u32.
>
> /*
> - * PKRU defines 32 bits, there are 16 domains and 2
> - * attribute bits per domain in pkru. pte_pkey is the
> - * index of the protection domain, so pte_pkey * 2 is
> - * is the index of the first bit for the domain.
> + * PKRU and PKRS both define 32 bits. There are 16 domains
> + * and 2 attribute bits per domain in them. pte_key is the
> + * index of the protection domain, so pte_pkey * 2 is the
> + * index of the first bit for the domain. The choice of
> + * PKRU and PKRS is determined by the accessed pages.
Please replace "accessed pages" with something along the lines of
The use of PKRU versus PKRS is selected by the address type, as determined by
the U/S bit in the paging-structure entries.
I.e. try to avoid "access" in favor of "address" to follow the SDM's wording.
