Per spec:"IA32_LBR_CTL.LBREn is saved and cleared on #SMI, and restored
on RSM. On a warm reset, all LBR MSRs, including IA32_LBR_DEPTH, have their
values preserved. However, IA32_LBR_CTL.LBREn is cleared to 0, disabling LBRs."
So clear Arch LBREn bit on #SMI and restore it on RSM manully, also clear the
bit when guest does warm reset.
Signed-off-by: Yang Weijiang <weijiang.yang@xxxxxxxxx>
---
arch/x86/kvm/vmx/vmx.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 316403cb4038..ea1efb48d1d6 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -4519,8 +4519,10 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
vmx_update_exception_bitmap(vcpu);
vpid_sync_context(vmx->vpid);
- if (init_event)
+ if (init_event) {
vmx_clear_hlt(vcpu);
+ flip_arch_lbr_ctl(vcpu, false);
+ }
}
static void vmx_enable_irq_window(struct kvm_vcpu *vcpu)
@@ -7523,6 +7525,7 @@ static int vmx_enter_smm(struct kvm_vcpu *vcpu, char *smstate)
vmx->nested.smm.vmxon = vmx->nested.vmxon;
vmx->nested.vmxon = false;
vmx_clear_hlt(vcpu);
+ flip_arch_lbr_ctl(vcpu, false);
return 0;
}
@@ -7543,6 +7546,7 @@ static int vmx_leave_smm(struct kvm_vcpu *vcpu, const char *smstate)
vmx->nested.smm.guest_mode = false;
}
+ flip_arch_lbr_ctl(vcpu, true);
return 0;
}
--
2.25.1
