Re: [PATCH v3 0/3] SVM 5-level page table support

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On 18/08/21 18:55, Wei Huang wrote:
This patch set adds 5-level page table support for AMD SVM. When the
5-level page table is enabled on host OS, the nested page table for guest
VMs will use the same format as host OS (i.e. 5-level NPT). These patches
were tested with various combination of different settings and test cases
(nested/regular VMs, AMD64/i686 kernels, kvm-unit-tests, etc.)

v2->v3:
  * Change the way of building root_hpa by following the existing flow (Sean)

v1->v2:
  * Remove v1's arch-specific get_tdp_level() and add a new parameter,
    tdp_forced_root_level, to allow forced TDP level (Sean)
  * Add additional comment on tdp_root table chaining trick and change the
    PML root table allocation code (Sean)
  * Revise Patch 1's commit msg (Sean and Jim)

Thanks,
-Wei

Wei Huang (3):
   KVM: x86: Allow CPU to force vendor-specific TDP level
   KVM: x86: Handle the case of 5-level shadow page table
   KVM: SVM: Add 5-level page table support for SVM

  arch/x86/include/asm/kvm_host.h |  6 ++--
  arch/x86/kvm/mmu/mmu.c          | 56 ++++++++++++++++++++++-----------
  arch/x86/kvm/svm/svm.c          | 13 ++++----
  arch/x86/kvm/vmx/vmx.c          |  3 +-
  4 files changed, 49 insertions(+), 29 deletions(-)


Queued, thanks, with NULL initializations according to Tom's review.

Paolo




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