On Thu, Aug 05, 2021, Jim Mattson wrote: > On Thu, Aug 5, 2021 at 1:55 PM Wei Huang <wei.huang2@xxxxxxx> wrote: > > > > This design assumes that all x86 CPUs have the flexibility of changing the > > nested page table level different from host CPU. > > I can't even parse this sentence. What are you trying to say here? NPT inherits the host's CR4, and thus CR4.LA57. So KVM NPT is stuck using whatever N-level paging the host kernel is using.
