From: Isaku Yamahata <isaku.yamahata@xxxxxxxxx> When x86machine doesn't support eoi intercept, set level_trigger_unsupported property of ioapic to true so that ioapic doesn't accept configuration to use level trigger. Signed-off-by: Isaku Yamahata <isaku.yamahata@xxxxxxxxx> --- hw/i386/microvm.c | 5 +++-- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- hw/i386/x86.c | 10 ++++++++-- include/hw/i386/x86.h | 6 ++++-- 5 files changed, 17 insertions(+), 8 deletions(-) diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c index aba0c83219..9b03d051ca 100644 --- a/hw/i386/microvm.c +++ b/hw/i386/microvm.c @@ -175,9 +175,10 @@ static void microvm_devices_init(MicrovmMachineState *mms) &error_abort); isa_bus_irqs(isa_bus, x86ms->gsi); - ioapic_init_gsi(gsi_state, "machine"); + ioapic_init_gsi(gsi_state, "machine", x86ms->eoi_intercept_unsupported); if (ioapics > 1) { - x86ms->ioapic2 = ioapic_init_secondary(gsi_state); + x86ms->ioapic2 = ioapic_init_secondary( + gsi_state, x86ms->eoi_intercept_unsupported); } kvmclock_create(true); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4c1e31f180..a601c4a916 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -223,7 +223,7 @@ static void pc_init1(MachineState *machine, } if (pcmc->pci_enabled) { - ioapic_init_gsi(gsi_state, "i440fx"); + ioapic_init_gsi(gsi_state, "i440fx", x86ms->eoi_intercept_unsupported); } if (tcg_enabled()) { diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 106f5726cc..464463766c 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -256,7 +256,7 @@ static void pc_q35_init(MachineState *machine) } if (pcmc->pci_enabled) { - ioapic_init_gsi(gsi_state, "q35"); + ioapic_init_gsi(gsi_state, "q35", x86ms->eoi_intercept_unsupported); } if (tcg_enabled()) { diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 9862fe5bc9..88c365b72d 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -608,7 +608,8 @@ void gsi_handler(void *opaque, int n, int level) } } -void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) +void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name, + bool level_trigger_unsupported) { DeviceState *dev; SysBusDevice *d; @@ -622,6 +623,8 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) } object_property_add_child(object_resolve_path(parent_name, NULL), "ioapic", OBJECT(dev)); + object_property_set_bool(OBJECT(dev), "level_trigger_unsupported", + level_trigger_unsupported, NULL); d = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(d, &error_fatal); sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS); @@ -631,13 +634,16 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) } } -DeviceState *ioapic_init_secondary(GSIState *gsi_state) +DeviceState *ioapic_init_secondary(GSIState *gsi_state, + bool level_trigger_unsupported) { DeviceState *dev; SysBusDevice *d; unsigned int i; dev = qdev_new(TYPE_IOAPIC); + object_property_set_bool(OBJECT(dev), "level_trigger_unsupported", + level_trigger_unsupported, NULL); d = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(d, &error_fatal); sysbus_mmio_map(d, 0, IO_APIC_SECONDARY_ADDRESS); diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 6eff42550f..7536e5fb8c 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -140,7 +140,9 @@ typedef struct GSIState { qemu_irq x86_allocate_cpu_irq(void); void gsi_handler(void *opaque, int n, int level); -void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); -DeviceState *ioapic_init_secondary(GSIState *gsi_state); +void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name, + bool eoi_intercept_unsupported); +DeviceState *ioapic_init_secondary(GSIState *gsi_state, + bool eoi_intercept_unsupported); #endif -- 2.25.1