On 6/24/21 12:31 PM, Sean Christopherson wrote: > On Thu, Jun 24, 2021, Tom Lendacky wrote: >>> >>> Here's an explanation of the physical address reduction for bare-metal and >>> guest. >>> >>> With MSR 0xC001_0010[SMEE] = 0: >>> No reduction in host or guest max physical address. >>> >>> With MSR 0xC001_0010[SMEE] = 1: >>> - Reduction in the host is enumerated by CPUID 0x8000_001F_EBX[11:6], >>> regardless of whether SME is enabled in the host or not. So, for example >>> on EPYC generation 2 (Rome) you would see a reduction from 48 to 43. >>> - There is no reduction in physical address in a legacy guest (non-SEV >>> guest), so the guest can use a 48-bit physical address > > So the behavior I'm seeing is either a CPU bug or user error. Can you verify > the unexpected #PF behavior to make sure I'm not doing something stupid? Yeah, I saw that in patch #3. Let me see what I can find out. I could just be wrong on that myself - it wouldn't be the first time. Thanks, Tom > > Thanks! > >>> - There is a reduction of only the encryption bit in an SEV guest, so >>> the guest can use up to a 47-bit physical address. This is why the >>> Qemu command line sev-guest option uses a value of 1 for the >>> "reduced-phys-bits" parameter. >>> >> >> The guest statements all assume that NPT is enabled. >> >> Thanks, >> Tom
