On 24/06/2021 14.01, Janosch Frank wrote:
Snippets are small guests That can be run under a unit test as the
hypervisor. They can be written in C or assembly. The C code needs a
linker script and a start assembly file that jumps to main to work
properly. So let's add that as well as a gitignore entry for the new
files.
Signed-off-by: Janosch Frank <frankja@xxxxxxxxxxxxx>
---
.gitignore | 1 +
s390x/snippets/c/cstart.S | 15 ++++++++++++
s390x/snippets/c/flat.lds | 51 +++++++++++++++++++++++++++++++++++++++
3 files changed, 67 insertions(+)
create mode 100644 s390x/snippets/c/cstart.S
create mode 100644 s390x/snippets/c/flat.lds
diff --git a/.gitignore b/.gitignore
index 8534fb7..b3cf2cb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -23,3 +23,4 @@ cscope.*
/api/dirty-log
/api/dirty-log-perf
/s390x/*.bin
+/s390x/snippets/*/*.gbin
diff --git a/s390x/snippets/c/cstart.S b/s390x/snippets/c/cstart.S
new file mode 100644
index 0000000..d7f6525
--- /dev/null
+++ b/s390x/snippets/c/cstart.S
@@ -0,0 +1,15 @@
+#include <asm/sigp.h>
+
+.section .init
+ .globl start
+start:
+ /* XOR all registers with themselves to clear them fully. */
+ .irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
+ xgr \i,\i
+ .endr
+ /* 0x3000 is the stack page for now */
+ lghi %r15, 0x4000 - 160
+ brasl %r14, main
+ /* For now let's only use cpu 0 in snippets so this will always work. */
+ xgr %r0, %r0
+ sigp %r2, %r0, SIGP_STOP
diff --git a/s390x/snippets/c/flat.lds b/s390x/snippets/c/flat.lds
new file mode 100644
index 0000000..5e70732
--- /dev/null
+++ b/s390x/snippets/c/flat.lds
@@ -0,0 +1,51 @@
+SECTIONS
+{
+ .lowcore : {
+ /*
+ * Initial short psw for disk boot, with 31 bit addressing for
+ * non z/Arch environment compatibility and the instruction
+ * address 0x10000 (cstart64.S .init).
I think this comment needs some adjustments (0x10000 => 0x4000 and do not
talk about cstart64.S)?
Also, what about switching to 64-bit mode in the snippets?
Thomas
+ */
+ . = 0;
+ LONG(0x00080000)
+ LONG(0x80004000)
+ /* Restart new PSW for booting via PSW restart. */
+ . = 0x1a0;
+ QUAD(0x0000000180000000)
+ QUAD(0x0000000000004000)
+ }
+ . = 0x4000;
+ .text : {
+ *(.init)
+ *(.text)
+ *(.text.*)
+ }
+ . = ALIGN(64K);
+ etext = .;
+ .opd : { *(.opd) }
+ . = ALIGN(16);
+ .dynamic : {
+ dynamic_start = .;
+ *(.dynamic)
+ }
+ .dynsym : {
+ dynsym_start = .;
+ *(.dynsym)
+ }
+ .rela.dyn : { *(.rela*) }
+ . = ALIGN(16);
+ .data : {
+ *(.data)
+ *(.data.rel*)
+ }
+ . = ALIGN(16);
+ .rodata : { *(.rodata) *(.rodata.*) }
+ . = ALIGN(16);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ __bss_end = .;
+ . = ALIGN(64K);
+ edata = .;
+ . += 64K;
+ . = ALIGN(64K);
+}
