Add a GBPAGES CPUID macro for a future NPT test and reorganize the entries to be explicitly Basic vs. Extended, with a hint that Basic leafs come from Intel and Extended leafs come from AMD. Organizing by Intel vs. AMD is at best misleading, e.g. if both support a feature, and at worst flat out wrong, e.g. AMD defined NX and LM (not sure about RDPRU, but avoiding such questions is the whole point of organizing by type). Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx> --- lib/x86/processor.h | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/lib/x86/processor.h b/lib/x86/processor.h index 8db13e9..173520f 100644 --- a/lib/x86/processor.h +++ b/lib/x86/processor.h @@ -141,7 +141,7 @@ static inline bool is_intel(void) */ /* - * Intel CPUID features + * Basic Leafs, a.k.a. Intel defined */ #define X86_FEATURE_MWAIT (CPUID(0x1, 0, ECX, 3)) #define X86_FEATURE_VMX (CPUID(0x1, 0, ECX, 5)) @@ -174,15 +174,16 @@ static inline bool is_intel(void) #define X86_FEATURE_SPEC_CTRL (CPUID(0x7, 0, EDX, 26)) #define X86_FEATURE_ARCH_CAPABILITIES (CPUID(0x7, 0, EDX, 29)) #define X86_FEATURE_PKS (CPUID(0x7, 0, ECX, 31)) + +/* + * Extended Leafs, a.k.a. AMD defined + */ +#define X86_FEATURE_SVM (CPUID(0x80000001, 0, ECX, 2)) #define X86_FEATURE_NX (CPUID(0x80000001, 0, EDX, 20)) +#define X86_FEATURE_GBPAGES (CPUID(0x80000001, 0, EDX, 26)) +#define X86_FEATURE_RDTSCP (CPUID(0x80000001, 0, EDX, 27)) #define X86_FEATURE_LM (CPUID(0x80000001, 0, EDX, 29)) #define X86_FEATURE_RDPRU (CPUID(0x80000008, 0, EBX, 4)) - -/* - * AMD CPUID features - */ -#define X86_FEATURE_SVM (CPUID(0x80000001, 0, ECX, 2)) -#define X86_FEATURE_RDTSCP (CPUID(0x80000001, 0, EDX, 27)) #define X86_FEATURE_AMD_IBPB (CPUID(0x80000008, 0, EBX, 12)) #define X86_FEATURE_NPT (CPUID(0x8000000A, 0, EDX, 0)) #define X86_FEATURE_NRIPS (CPUID(0x8000000A, 0, EDX, 3)) -- 2.32.0.288.g62a8d224e6-goog
