Hi Marc, On 6/1/21 11:39 AM, Marc Zyngier wrote: > This is a new version of the series previously posted at [3], reworking > the vGIC and timer code to cope with the M1 braindead^Wamusing nature. > > Hardly any change this time around, mostly rebased on top of upstream > now that the dependencies have made it in. > > Tested with multiple concurrent VMs running from an initramfs. > > Until someone shouts loudly now, I'll take this into 5.14 (and in > -next from tomorrow). I am not familiar with irqdomains or with the irqchip infrastructure, so I can't really comment on patch #8. I tried testing this with a GICv3 by modifying the driver to set no_hw_deactivation and no_maint_irq_mask: diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c index 340c51d87677..d0c6f808d7f4 100644 --- a/arch/arm64/kvm/vgic/vgic-init.c +++ b/arch/arm64/kvm/vgic/vgic-init.c @@ -565,8 +565,10 @@ int kvm_vgic_hyp_init(void) if (ret) return ret; + /* if (!has_mask) return 0; + */ ret = request_percpu_irq(kvm_vgic_global_state.maint_irq, vgic_maintenance_handler, diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 453fc425eede..9ce4dee20655 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -1850,6 +1850,12 @@ static void __init gic_of_setup_kvm_info(struct device_node *node) if (!ret) gic_v3_kvm_info.vcpu = r; + gic_v3_kvm_info.no_hw_deactivation = true; + gic_v3_kvm_info.no_maint_irq_mask = true; + + vgic_set_kvm_info(&gic_v3_kvm_info); + return; + gic_v3_kvm_info.has_v4 = gic_data.rdists.has_vlpis; gic_v3_kvm_info.has_v4_1 = gic_data.rdists.has_rvpeid; vgic_set_kvm_info(&gic_v3_kvm_info); Kept the maintenance irq ID so the IRQ gets enabled at the Redistributor level. I don't know if I managed to break something with those changes, but when testing on the model and on a rockpro64 (with the patches cherry-picked on top of v5.13-rc7) I kept seeing rcu stalls. I assume I did something wrong. Thanks, Alex > > * From v3 [3]: > - Rebased on 5.13-rc4 to match the kvmarm/next base > - Moved stuff from patch #7 to its logical spot in patch #8 > - Changed the include/linux/irqchip/arm-vgic-info.h guard > - Collected RBs from Alex, with thanks > > * From v2 [2]: > - Rebased on 5.13-rc1 > - Fixed a couple of nits in the GIC registration code > > * From v1 [1]: > - Rebased on Hector's v4 posting[0] > - Dropped a couple of patches that have been merged in the above series > - Fixed irq_ack callback on the timer path > > [0] https://lore.kernel.org/r/20210402090542.131194-1-marcan@xxxxxxxxx > [1] https://lore.kernel.org/r/20210316174617.173033-1-maz@xxxxxxxxxx > [2] https://lore.kernel.org/r/20210403112931.1043452-1-maz@xxxxxxxxxx > [3] https://lore.kernel.org/r/20210510134824.1910399-1-maz@xxxxxxxxxx > > Marc Zyngier (9): > irqchip/gic: Split vGIC probing information from the GIC code > KVM: arm64: Handle physical FIQ as an IRQ while running a guest > KVM: arm64: vgic: Be tolerant to the lack of maintenance interrupt > masking > KVM: arm64: vgic: Let an interrupt controller advertise lack of HW > deactivation > KVM: arm64: vgic: move irq->get_input_level into an ops structure > KVM: arm64: vgic: Implement SW-driven deactivation > KVM: arm64: timer: Refactor IRQ configuration > KVM: arm64: timer: Add support for SW-based deactivation > irqchip/apple-aic: Advertise some level of vGICv3 compatibility > > arch/arm64/kvm/arch_timer.c | 162 +++++++++++++++++++++---- > arch/arm64/kvm/hyp/hyp-entry.S | 6 +- > arch/arm64/kvm/vgic/vgic-init.c | 36 +++++- > arch/arm64/kvm/vgic/vgic-v2.c | 19 ++- > arch/arm64/kvm/vgic/vgic-v3.c | 19 ++- > arch/arm64/kvm/vgic/vgic.c | 14 +-- > drivers/irqchip/irq-apple-aic.c | 9 ++ > drivers/irqchip/irq-gic-common.c | 13 -- > drivers/irqchip/irq-gic-common.h | 2 - > drivers/irqchip/irq-gic-v3.c | 6 +- > drivers/irqchip/irq-gic.c | 6 +- > include/kvm/arm_vgic.h | 41 +++++-- > include/linux/irqchip/arm-gic-common.h | 25 +--- > include/linux/irqchip/arm-vgic-info.h | 45 +++++++ > 14 files changed, 299 insertions(+), 104 deletions(-) > create mode 100644 include/linux/irqchip/arm-vgic-info.h >
