On Thu, Jun 10, 2021 at 3:44 PM Nadav Amit <nadav.amit@xxxxxxxxx> wrote: > > > > > On Jun 9, 2021, at 6:22 PM, Like Xu <like.xu.linux@xxxxxxxxx> wrote: > > > > Hi Nadav, > > > > Nadav Amit <nadav.amit@xxxxxxxxx> 于2021年6月10日周四 上午2:33写道： > >> > >> From: Nadav Amit <nadav.amit@xxxxxxxxx> > >> > >> x86's PMU tests are not compatible with version 1. Instead of finding > >> how to adapt them, just skip them if the PMU version is too old. > > > > Instead of skipping pmu.v1, it would be better to just skip the tests > > of fixed counters. > > But considering this version is really too old, this change looks fine to me. > > If it were that simple, I would have done it. > > v1 does not support MSR_CORE_PERF_GLOBAL_OVF_CTRL, > MSR_CORE_PERF_GLOBAL_STATUS and MSR_CORE_PERF_GLOBAL_CTRL, which are > being used all over the code. These MSRs were only introduced on > version 2 (Intel SDM, section 18.2.2 "Architectural Performance > Monitoring Version 2”). > >From the log of feature enbling code, this is true. But accroding to Table 2-2. IA-32 Architectural MSRs, - IA32_PERF_GLOBAL_OVF_CTRL, if CPUID.0AH: EAX[7:0] > 0 && CPUID.0AH: EAX[7:0] <= 3 - IA32_PERF_GLOBAL_STATUS, if CPUID.0AH: EAX[7:0] > 0 - IA32_PERF_GLOBAL_CTRL, if CPUID.0AH: EAX[7:0] > 0
