On Thu, 3 Jun 2021 at 23:34, Sean Christopherson <seanjc@xxxxxxxxxx> wrote:
>
> On Thu, Jun 03, 2021, Jim Mattson wrote:
> > On Thu, Jun 3, 2021 at 2:01 AM Wanpeng Li <kernellwp@xxxxxxxxx> wrote:
> > >
> > > From: Wanpeng Li <wanpengli@xxxxxxxxxxx>
> > >
> > > The value of current counter register after reset is 0 for both Intel
> > > and AMD, let's do it in kvm.
> > >
> > > Signed-off-by: Wanpeng Li <wanpengli@xxxxxxxxxxx>
> >
> > How did we miss that?
>
> I suspect it's not actually a functional issue, and that writing '0' at reset is
> a glorified nop. The TMCCT is always computed on-demand and never directly
> readable.
Update the patch description in v2, thanks.
Wanpeng
>
> Is there an observable bug being fixed? If not, the changelog should state that
> this is a cosmetic change of sorts.
>
> static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset)
> {
> u32 val = 0;
>
> if (offset >= LAPIC_MMIO_LENGTH)
> return 0;
>
> switch (offset) {
> case APIC_ARBPRI:
> break;
>
> case APIC_TMCCT: /* Timer CCR */
> if (apic_lvtt_tscdeadline(apic))
> return 0;
>
> val = apic_get_tmcct(apic);
> break;
> ...
> }
>
>
> static u32 apic_get_tmcct(struct kvm_lapic *apic)
> {
> ktime_t remaining, now;
> s64 ns;
> u32 tmcct;
>
> ASSERT(apic != NULL);
>
> /* if initial count is 0, current count should also be 0 */
> if (kvm_lapic_get_reg(apic, APIC_TMICT) == 0 || <------------
> apic->lapic_timer.period == 0)
> return 0;
>
> now = ktime_get();
> remaining = ktime_sub(apic->lapic_timer.target_expiration, now);
> if (ktime_to_ns(remaining) < 0)
> remaining = 0;
>
> ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period);
> tmcct = div64_u64(ns,
> (APIC_BUS_CYCLE_NS * apic->divide_count));
>
> return tmcct;
> }
>
> int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
> {
> memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s));
>
> /*
> * Get calculated timer current count for remaining timer period (if
> * any) and store it in the returned register set.
> */
> __kvm_lapic_set_reg(s->regs, APIC_TMCCT,
> __apic_read(vcpu->arch.apic, APIC_TMCCT)); <----
>
> return kvm_apic_state_fixup(vcpu, s, false);
> }
>
>
>
