On Tue, May 18, 2021 at 03:55:13PM +0800, Xu, Like wrote:
> On 2021/5/17 16:18, Peter Zijlstra wrote:
> > On Tue, May 11, 2021 at 10:42:03AM +0800, Like Xu wrote:
> > > The mask value of fixed counter control register should be dynamic
> > > adjusted with the number of fixed counters. This patch introduces a
> > > variable that includes the reserved bits of fixed counter control
> > > registers. This is needed for later Ice Lake fixed counter changes.
> > >
> > > Co-developed-by: Luwei Kang <luwei.kang@xxxxxxxxx>
> > > Signed-off-by: Luwei Kang <luwei.kang@xxxxxxxxx>
> > > Signed-off-by: Like Xu <like.xu@xxxxxxxxxxxxxxx>
> > > ---
> > > arch/x86/include/asm/kvm_host.h | 1 +
> > > arch/x86/kvm/vmx/pmu_intel.c | 6 +++++-
> > > 2 files changed, 6 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> > > index 55efbacfc244..49b421bd3dd8 100644
> > > --- a/arch/x86/include/asm/kvm_host.h
> > > +++ b/arch/x86/include/asm/kvm_host.h
> > > @@ -457,6 +457,7 @@ struct kvm_pmu {
> > > unsigned nr_arch_fixed_counters;
> > > unsigned available_event_types;
> > > u64 fixed_ctr_ctrl;
> > > + u64 fixed_ctr_ctrl_mask;
> > > u64 global_ctrl;
> > > u64 global_status;
> > > u64 global_ovf_ctrl;
> > > diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> > > index d9dbebe03cae..ac7fe714e6c1 100644
> > > --- a/arch/x86/kvm/vmx/pmu_intel.c
> > > +++ b/arch/x86/kvm/vmx/pmu_intel.c
> > > @@ -400,7 +400,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> > > case MSR_CORE_PERF_FIXED_CTR_CTRL:
> > > if (pmu->fixed_ctr_ctrl == data)
> > > return 0;
> > > - if (!(data & 0xfffffffffffff444ull)) {
> > > + if (!(data & pmu->fixed_ctr_ctrl_mask)) {
> > Don't we already have hardware with more than 3 fixed counters?
>
> Yes, so we update this mask based on the value of pmu->nr_arch_fixed_counters:
Yes, I saw that, but the Changelog makes it appear this is only relevant
to ice lake, which I think is not fully correct.
