On 22/04/21 18:15, Sean Christopherson wrote:
Support for 5-level page tables on NPT is not hard to fix and could be
tested by patching QEMU. However, the !NPT case would also have to be fixed
by extending the PDP and PML4 stacking trick to a PML5.
Isn't that backwards? It's the nested NPT case that requires the stacking trick.
When !NPT is disabled in L0 KVM, 32-bit guests are run with PAE paging. Maybe
I'm misunderstanding what you're suggesting.
Yes, you're right. NPT is easy but we would have to guess what the spec
would say about MAXPHYADDR, while nNPT would require the stacking of a
PML5. Either way, blocking KVM is the easiest thing todo.
Paolo
