On Mon, Apr 19, 2021 at 11:28 AM Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > > On 19/04/21 19:57, Krish Sadhukhan wrote: > > The reason why I thought of this is that SVM implementation uses only > > the lower half, as all AMD-defined exit code are handled therein only. > > Is this still going to cause an issue ? > > I would have to check what happens on bare metal, but VMEXIT_INVALID is > defined as "-1", not "FFFFFFFFh", so I think it should use the high 32 > bits (in which case KVM is wrong in not storing the high 32 bits). And VMEXIT_BUSY is -2.