Re: [PATCH v2 3/3] ppc: Enable 2nd DAWR support on p10

Ravi Bangoria <ravi.bangoria@xxxxxxxxxxxxx> · Mon, 29 Mar 2021 19:04:24 +0530




Hi David,

@@ -241,6 +241,31 @@ static void spapr_dt_pa_features(SpaprMachineState *spapr,
          /* 60: NM atomic, 62: RNG */
          0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
      };
+    uint8_t pa_features_310[] = { 66, 0,
+        /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
+        /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
+        0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
+        /* 6: DS207 */
+        0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
+        /* 16: Vector */
+        0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
+        /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
+        0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
+        /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
+        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
+        /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
+        0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
+        /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
+        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
+        /* 42: PM, 44: PC RA, 46: SC vec'd */
+        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
+        /* 48: SIMD, 50: QP BFP, 52: String */
+        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
+        /* 54: DecFP, 56: DecI, 58: SHA */
+        0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
+        /* 60: NM atomic, 62: RNG, 64: DAWR1 */
+        0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
+    };

I don't see any point adding pa_features_310: it's identical to
pa_features_300, AFAICT.

Sure. The only difference is in the comment part: /* ... 64: DAWR1  */
I'll update pa_features_300 with something like:

        /* ... 64: DAWR1 (ISA 3.1) */

and reuse pa_features_300.

[...]

+static void cap_dawr1_apply(SpaprMachineState *spapr, uint8_t val,
+                               Error **errp)
+{
+    if (!val) {
+        return; /* Disable by default */
+    }
+
+    if (tcg_enabled()) {
+        error_setg(errp,
+                "DAWR1 not supported in TCG. Try appending -machine cap-dawr1=off");

I don't love this.  Is anyone working on DAWR1 emulation for POWER10?

No. Infact DAWR0 is also not enabled in TCG mode.

[...]

  static void gen_spr_970_dbg(CPUPPCState *env)
  {
      /* Breakpoints */
@@ -8727,7 +8742,7 @@ static void init_proc_POWER8(CPUPPCState *env)
      /* Common Registers */
      init_proc_book3s_common(env);
      gen_spr_sdr1(env);
-    gen_spr_book3s_207_dbg(env);
+    gen_spr_book3s_310_dbg(env);

This should surely be in init_proc_POWER10, not init_proc_POWER8.

Sure.

Thanks for the review,
Ravi






