As the enabling of the guest timer interrupts is done by
accessing a system register, make sure the access is correctly
synchronised.
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
---
drivers/irqchip/irq-apple-aic.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
index ddc0856f36a5..447c9e87f13a 100644
--- a/drivers/irqchip/irq-apple-aic.c
+++ b/drivers/irqchip/irq-apple-aic.c
@@ -242,9 +242,11 @@ static void aic_fiq_mask(struct irq_data *d)
switch (d->hwirq) {
case AIC_TMR_GUEST_PHYS:
sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_P, 0);
+ isb();
break;
case AIC_TMR_GUEST_VIRT:
sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, VM_TMR_FIQ_ENABLE_V, 0);
+ isb();
break;
}
}
@@ -254,9 +256,11 @@ static void aic_fiq_unmask(struct irq_data *d)
switch (d->hwirq) {
case AIC_TMR_GUEST_PHYS:
sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, 0, VM_TMR_FIQ_ENABLE_P);
+ isb();
break;
case AIC_TMR_GUEST_VIRT:
sysreg_clear_set_s(SYS_APL_VM_TMR_FIQ_ENA_EL1, 0, VM_TMR_FIQ_ENABLE_V);
+ isb();
break;
}
}
--
2.29.2
