Fix nested NPT (nSVM) with 32-bit L1 and SME with shadow paging, which
are completely broken. Opportunistically fix theoretical bugs related to
prematurely reloading/unloading the MMU.
If nNPT is enabled, L1 can crash the host simply by using 32-bit NPT to
trigger a null pointer dereference on pae_root.
SME with shadow paging (including nNPT) fails to set the C-bit in the
shadow pages that don't go through standard MMU flows (PDPTPRs and the
PML4 used by nNPT to shadow legacy NPT). It also failes to account for
CR3[63:32], and thus the C-bit, being ignored outside of 64-bit mode.
Patches 01 and 02 fix the null pointer bugs.
Patches 03-07 fix mostly-benign related memory leaks.
Patches 08-10 fix the SME shadow paging bugs, which are also what led me to
the nNPT null pointer bugs.
Patches 11 and 12 fix theoretical bugs with PTP_SWITCH and INVPCID that
I found when auditing flows that touch the MMU context.
Patches 13-15 do additional clean up to hopefully make it harder to
introduce bugs in the future.
On the plus side, I finally understand why KVM supports shadowing 2-level
page tables with 4-level page tables...
Based on kvm/queue, commit fe5f0041c026 ("KVM/SVM: Move vmenter.S exception
fixups out of line"). The null pointer fixes cherry-pick cleanly onto
kvm/master, haven't tried the other bug fixes (I doubt they're worth
backporting even though I tagged 'em with stable).
Sean Christopherson (15):
KVM: nSVM: Set the shadow root level to the TDP level for nested NPT
KVM: x86/mmu: Alloc page for PDPTEs when shadowing 32-bit NPT with
64-bit
KVM: x86/mmu: Ensure MMU pages are available when allocating roots
KVM: x86/mmu: Allocate the lm_root before allocating PAE roots
KVM: x86/mmu: Check PDPTRs before allocating PAE roots
KVM: x86/mmu: Fix and unconditionally enable WARNs to detect PAE leaks
KVM: x86/mmu: Use '0' as the one and only value for an invalid PAE
root
KVM: x86/mmu: Set the C-bit in the PDPTRs and LM pseudo-PDPTRs
KVM: x86/mmu: Mark the PAE roots as decrypted for shadow paging
KVM: SVM: Don't strip the C-bit from CR2 on #PF interception
KVM: nVMX: Defer the MMU reload to the normal path on an EPTP switch
KVM: x86: Defer the MMU unload to the normal path on an global INVPCID
KVM: x86/mmu: Unexport MMU load/unload functions
KVM: x86/mmu: Sync roots after MMU load iff load as successful
KVM: x86/mmu: WARN on NULL pae_root and bad shadow root level
arch/x86/include/asm/kvm_host.h | 3 -
arch/x86/kvm/mmu.h | 4 +
arch/x86/kvm/mmu/mmu.c | 209 +++++++++++++++++++-------------
arch/x86/kvm/mmu/tdp_mmu.c | 23 +---
arch/x86/kvm/svm/svm.c | 9 +-
arch/x86/kvm/vmx/nested.c | 9 +-
arch/x86/kvm/x86.c | 2 +-
7 files changed, 142 insertions(+), 117 deletions(-)
--
2.30.1.766.gb4fecdf3b7-goog
