From: Sean Christopherson <sean.j.christopherson@xxxxxxxxx> Add a machine option to disable the legacy PIC (8259), which cannot be supported for TDX guests as TDX-SEAM doesn't allow directly interrupt injection. Using posted interrupts for the PIC is not a viable option as the guest BIOS/kernel will not do EOI for PIC IRQs, i.e. will leave the vIRR bit set. Signed-off-by: Sean Christopherson <sean.j.christopherson@xxxxxxxxx> --- hw/i386/pc.c | 18 ++++++++++++++++++ hw/i386/pc_piix.c | 4 +++- hw/i386/pc_q35.c | 4 +++- include/hw/i386/pc.h | 2 ++ 4 files changed, 26 insertions(+), 2 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8aa85dec54..12d44659bf 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1532,6 +1532,20 @@ static void pc_machine_set_hpet(Object *obj, bool value, Error **errp) pcms->hpet_enabled = value; } +static bool pc_machine_get_pic(Object *obj, Error **errp) +{ + PCMachineState *pcms = PC_MACHINE(obj); + + return pcms->pic_enabled; +} + +static void pc_machine_set_pic(Object *obj, bool value, Error **errp) +{ + PCMachineState *pcms = PC_MACHINE(obj); + + pcms->pic_enabled = value; +} + static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) @@ -1672,6 +1686,7 @@ static void pc_machine_initfn(Object *obj) pcms->smbus_enabled = true; pcms->sata_enabled = true; pcms->pit_enabled = true; + pcms->pic_enabled = true; pcms->max_fw_size = 8 * MiB; #ifdef CONFIG_HPET pcms->hpet_enabled = true; @@ -1797,6 +1812,9 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) object_class_property_add_bool(oc, PC_MACHINE_PIT, pc_machine_get_pit, pc_machine_set_pit); + object_class_property_add_bool(oc, PC_MACHINE_PIC, + pc_machine_get_pic, pc_machine_set_pic); + object_class_property_add_bool(oc, "hpet", pc_machine_get_hpet, pc_machine_set_hpet); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 2904b40163..4b59d40c3c 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -220,7 +220,9 @@ static void pc_init1(MachineState *machine, } isa_bus_irqs(isa_bus, x86ms->gsi); - pc_i8259_create(isa_bus, gsi_state->i8259_irq); + if (pcms->pic_enabled) { + pc_i8259_create(isa_bus, gsi_state->i8259_irq); + } if (pcmc->pci_enabled) { ioapic_init_gsi(gsi_state, "i440fx"); diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 0a212443aa..c68799efbb 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -250,7 +250,9 @@ static void pc_q35_init(MachineState *machine) pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq); isa_bus = ich9_lpc->isa_bus; - pc_i8259_create(isa_bus, gsi_state->i8259_irq); + if (pcms->pic_enabled) { + pc_i8259_create(isa_bus, gsi_state->i8259_irq); + } if (pcmc->pci_enabled) { ioapic_init_gsi(gsi_state, "q35"); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 5f93540a43..6368f7bf77 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -44,6 +44,7 @@ typedef struct PCMachineState { bool sata_enabled; bool pit_enabled; bool hpet_enabled; + bool pic_enabled; uint64_t max_fw_size; char *oem_id; char *oem_table_id; @@ -63,6 +64,7 @@ typedef struct PCMachineState { #define PC_MACHINE_SMBUS "smbus" #define PC_MACHINE_SATA "sata" #define PC_MACHINE_PIT "pit" +#define PC_MACHINE_PIC "pic" #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" #define PC_MACHINE_OEM_ID "oem-id" #define PC_MACHINE_OEM_TABLE_ID "oem-table-id" -- 2.17.1