Hi Marc, The patch looks correct to me. Just to be on the safe side, I had a look at how the other fields are generated and they match the architecture: Reviewed-by: Alexandru Elisei <alexandru.elisei@xxxxxxx> On 1/25/21 12:26 PM, Marc Zyngier wrote: > The AArch32 CP14 DBGDIDR has bit 15 set to RES1, which our current > emulation doesn't set. Just add the missing bit. > > Reported-by: Peter Maydell <peter.maydell@xxxxxxxxxx> > Reviewed-by: Eric Auger <eric.auger@xxxxxxxxxx> > Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx> > --- > arch/arm64/kvm/sys_regs.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 3313dedfa505..0c0832472c4a 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1711,7 +1711,7 @@ static bool trap_dbgidr(struct kvm_vcpu *vcpu, > p->regval = ((((dfr >> ID_AA64DFR0_WRPS_SHIFT) & 0xf) << 28) | > (((dfr >> ID_AA64DFR0_BRPS_SHIFT) & 0xf) << 24) | > (((dfr >> ID_AA64DFR0_CTX_CMPS_SHIFT) & 0xf) << 20) > - | (6 << 16) | (el3 << 14) | (el3 << 12)); > + | (6 << 16) | (1 << 15) | (el3 << 14) | (el3 << 12)); > return true; > } > }
