+ kvm@xxxxxxxxxxxxxxx
Hi Liuxiangdong,
On 2021/1/22 18:02, Liuxiangdong (Aven, Cloud Infrastructure Service
Product Dept.) wrote:
Hi Like,
Some questions about
https://lore.kernel.org/kvm/20210104131542.495413-1-like.xu@xxxxxxxxxxxxxxx/ <https://lore.kernel.org/kvm/20210104131542.495413-1-like.xu@xxxxxxxxxxxxxxx/>
Thanks for trying the PEBS feature in the guest,
and I assume you have correctly applied the QEMU patches for guest PEBS.
1)Test in IceLake
In the [PATCH v3 10/17] KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS,
DTES64, we only support Ice Lake with the following x86_model(s):
#define INTEL_FAM6_ICELAKE_X 0x6A
#define INTEL_FAM6_ICELAKE_D 0x6C
you can check the eax output of "cpuid -l 1 -1 -r",
for example "0x000606a4" meets this requirement.
HOST:
CPU family: 6
Model: 106
Model name: Intel(R) Xeon(R) Platinum 8378A CPU $@ $@
microcode: sig=0x606a6, pf=0x1, revision=0xd000122
As long as you get the latest BIOS from the provider,
you may check 'cat /proc/cpuinfo | grep code | uniq' with the latest one.
Guest: linux kernel 5.11.0-rc2
I assume it's the "upstream tag v5.11-rc2" which is fine.
We can find pebs/intel_pt flag in guest cpuinfo, but there still exists
error when we use perf
Just a note, intel_pt and pebs are two features and we can write
pebs records to intel_pt buffer with extra hardware support.
(by default, pebs records are written to the pebs buffer)
You may check the output of "dmesg | grep PEBS" in the guest
to see if the guest PEBS cpuinfo is exposed and use "perf record
–e cycles:pp" to see if PEBS feature actually works in the guest.
# perf record –e cycles:pp
Error:
cycles:pp: PMU Hardware doesn’t support sampling/overflow-interrupts. Try
‘perf stat’
Could you give some advice?
If you have more specific comments or any concerns, just let me know.
2)Test in Skylake
HOST:
CPU family: 6
Model: 85
Model name: Intel(R) Xeon(R) Gold 6146 CPU @
3.20GHz
microcode : 0x2000064
Guest: linux 4.18
we cannot find intel_pt flag in guest cpuinfo because
cpu_has_vmx_intel_pt() return false.
You may check vmx_pebs_supported().
SECONDARY_EXEC_PT_USE_GPA/VM_EXIT_CLEAR_IA32_RTIT_CTL/VM_ENTRY_LOAD_IA32_RTIT_CTL
are both disable.
Is it because microcode is not supported?
And, isthere a new macrocode which can support these bits? How can we get this?
Currently, this patch set doesn't support guest PEBS on the Skylake
platforms, and if we choose to support it, we will let you know.
---
thx,likexu
Thanks,
Liuxiangdong
