On 1/19/21 9:02 PM, Matthew Rosato wrote:
Today, ISM devices are completely disallowed for vfio-pci passthrough as QEMU will reject the device due to an (inappropriate) MSI-X check. However, in an effort to enable ISM device passthrough, I realized that the manner in which ISM performs block write operations is highly incompatible with the way that QEMU s390 PCI instruction interception and vfio_pci_bar_rw break up I/O operations into 8B and 4B operations -- ISM devices have particular requirements in regards to the alignment, size and order of writes performed. Furthermore, they require that legacy/non-MIO s390 PCI instructions are used, which is also not guaranteed when the I/O is passed through the typical userspace channels. As a result, this patchset proposes a new VFIO region to allow a guest to pass certain PCI instruction intercepts directly to the s390 host kernel PCI layer for execution, pinning the guest buffer in memory briefly in order to execute the requested PCI instruction. Changes from RFC -> v1: - No functional changes, just minor commentary changes -- Re-posting along with updated QEMU set.
Hi, there are is a concerns about this patch series: As the title says it is strongly related to ISM hardware. Why being so specific? Regards, Pierre -- Pierre Morel IBM Lab Boeblingen
